Exemplary embodiments of the present invention relate to a non-volatile memory device and a fabrication method thereof, and more particularly, to a non-volatile memory device including a plurality of memory cells being stacked vertically over a substrate and a method for fabricating the same.
A non-volatile memory device retains data stored therein even if power is cut off. There are different types of non-volatile memory devices such as NAND flash memory.
As the integration degree of a two-dimensional memory structure where memory cells are formed in a single layer over a silicon substrate is reaching limits, a three-dimensional non-volatile memory device where a plurality of memory cells are stacked vertically to a silicon substrate are being developed.
Meanwhile, a non-volatile memory device includes a plurality of strings each of which includes a source selection transistor, memory cell transistors, and a drain selection transistor that are coupled serially. One end of each string is coupled with a bit line, and the other end of the string is coupled with one source line in common.
However, as the number of strings coupled with one source line increases, current consumption increases during a read operation. Thus, it is desirable to decrease the resistance of the source line.